It was well-known that the edge of the silicon wafer was necessary to be bevelled for IC (integrated circuits) manufacturing. In the conventional bonded wafer technique of the SOI (single-crystal Semiconductor-film On Insulator) technology, when two of this kind of silicon wafers were bonded together as shown in FIG. 1, followed by the lapping and polishing operation to obtain a silicon film on insulator, it resulted in a sharp edge in the SOI structure as shown in FIG. 2.
As shown in FIG. 1, one wafer is called holding wafer 100 and the other is called bonding wafer 110. The holding wafer 100 has a silicon dioxide (oxide) layer which is called holding oxide layer 101, flat mirror-like polished front surface called holding front surface 130, bevelled holding front surface 120, holding back surface 129, and bevelled holding back surface 119. Similarly, bonding wafer 110 has a silicon dioxide (oxide) layer called bonding oxide layer 111, flat mirror-like polished surface called bonding front surface 131, bevelled bonding front surface 121, bonding back surface 132, and bevelled bonding back surface 122. By facing both bonding and holding front surfaces, 131 and 130 respectively, bonding wafer 110 and holding wafer 100 were bonded together in the current technique. Between bonding front surface 131 and holding front surface 130 was the interposed oxide layer which consists of holding oxide layer 101 and bonding oxide layer 111. The operation of lapping and polishing bonding back surface 132 was followed to result in silicon film 112 on insulator (interposed oxide layer) as shown in FIG. 2. It clearly showed the sharp edge of the silicon film 112 in this SOI wafer. This sharp edge will cause a serious problem in IC manufacturing. A technique to solve this problem has been reported in U.S. Pat. No. 5,152,857 by Ito et al.. It employed a carefully calculated bevelled front surface and a special polishing process to achieve the desired bevelled front surface of the silicon film on insulator. Obviously, this technique required an accurate edge bevelling operation and a precision alignment operation in the bonding process. Another technique has also been reported in U.S. patent application No. 08/120,797 by Y. C. Yen. This technique employed an additional bonding-assistant tool to obtain the silicon film having the original bevelled edge. Both methods are not simple in the actual implementation in SOI wafer manufacturing and suffer a drawback which is that the peripheral edge of the interposed oxide layer is exposed without any protection during wafer processing. It will cause some difficulty in IC manufacturing. This invention will teach a simple manufacturable technique to solve the edge problem.